1. Field of the Invention
The present invention relates to electronic testing equipment, and more specifically to apparatuses for generating pulses.
2. Description of the Related Art
Testing of a semiconductor device, termed a device under test (DUT), is often done to evaluate its performance. Testing equipment can be used to measure a transistor's operation by applying currents or voltages to a transistor's input (base relative to emitter of a bipolar transistor or gate relative to source of field effect transistor, or FET) and recording the transistor's output voltage and current (at the collector or drain) as it changes in response to the applied input. A “transistor curve tracer” is an example of such testing equipment. The results of such testing are often graphically presented as a curve showing the output current (I in electrical engineering notation) changes with output voltage (V) based on applied input voltage. FIG. 1 shows a family of such “I-V curves”. These I-V curves display the static or DC characteristics of transistors as the applied voltages and measuring currents change slowly allowing the transistor to reach steady state for each measurement.
One limitation of I-V measurement of transistor parameters as just described is the power delivered to the transistor (product of voltages and currents) must be kept low or the temperature of the DUT will be changed due to heating from the dissipated power. Semiconductor parameters vary with temperature changes, so DUT temperature must be controlled or limited. Transistors used with a low duty cycle or in pulsed operation can be used to control high power loads, but their high power operation cannot be measured statically for the resulting heating would be excessive.
A test method termed “pulsed I-V” has been used to avoid the heating effects of the slow static or DC parameter measurements of transistor characteristics. This term is apropos as the current is determined as a function of voltage during short duration pulses applied at low duty cycles. This allows measurements to be made with little of the DUT heating that would occur with static measurements. Another use of pulsed I-V testing is to determine the DUT's high frequency response by applying a pulse to change its operation. This can be used to measure the effects of charge trapping sites that are prevalent in high frequency integrated circuits (ICs) in compound semiconductors, such as GaAs.
As transistors increase in speed, the measurements need to be made at higher speeds to measure parameters at operational frequencies. This can be accomplished by using very short pulses, such as pulses of 10 nanoseconds in duration. These fast pulses can be generated by today's pulse generators (pulsers), some of which are made themselves with high frequency transistors. All pulsers that control voltages and currents that form an output pulse using diodes and transistors of any type will be herein collectively termed “solid state pulse generators,” or “solid state pulsers.” Such solid state pulsers typically have features such as an external trigger or control input that can initiate the pulse generation cycle. The time between the trigger input and the leading edge of the output pulse is usually a fixed time plus a user controlled variable time delay.
One performance feature of pulsers is the slew rate, or maximum rate of change, of its output voltage transitions. For example, a 5 volt pulse leading edge that has a 10% to 90% transition time of 1 nanosecond (ns) has a 4 volt/ns slew rate. Very fast solid state pulsers have maximum slew rates approaching 20V/ns. High power solid state pulsers can produce 50 to 100V pulses into a 50 ohm cable, but the highest slew rate solid state pulsers produce less than 5 volt pulses.
These solid state pulsers, which switch electrical energy to the output using transistors, can be contrasted to pulse generators that form a pulse by switching electrical energy with a sudden spark or arc discharge. Pulsers that use electrical discharges to conduct the current that produces their outputs will be herein collectively termed “spark discharge pulse generators,” or “spark discharge pulsers.” An example of a spark discharge pulse generator is an electrostatic simulator as described in Military Specification MIL-STD-883C Method 3015.7 and shown in FIG. 2. In this type of pulse generator, a capacitor is used as a charge storage device which is charged over a relatively long time period to a high voltage and discharged in a very short time period to form the pulse. The pulse in this example is generated when the switch S1 is activated and the moving armature of switch S1 of FIG. 2 approaches the normally open contact of that switch, but before the armature actually contacts the normally open contact, a spark occurs within the gas between the armature and the normally open contract of the switch and the gas in the switch becomes ionized and conductive. Such spark discharges are characterized by very fast rise in current flow and moderately low resistances when a large current is flowing. Sparking or arcing will occur when the electric field strength, produced by the voltage difference between the contacts over the distance that separates them, exceeds the breakdown voltage between the contacts. This spark begins when a random free electron in the gas or fluid between the contracts is accelerated sufficiently by the electric field between the contacts to gain adequate kinetic energy that when it hits a molecule of the gas or fluid, its energy can ionize this molecule freeing another electron. When the free electron population quickly increases, an avalanche of charge carriers forms, and a spark capable of carrying the current to form a pulse is formed. When that first electron, which has been sometimes termed the ‘lucky electron’ begins a spark, the switch quickly changes from a non-conductive state to a highly conductive state and remains conductive while sufficient current flows to maintain the spark conditions. In the circuit of FIG. 2, the high current will slowly decay as the stored electric charge in the storage capacitor C1 is drained, and at some point in time the current through the switch will be so small that the spark extinguishes and the current through the switch quickly decreases. Spark discharges can be made with switches, relays, spark gaps, contactors, circuit breakers and similar devices. Herein the terms “spark discharge pulse generator” and “spark discharge pulser” should be understood to encompass all these types of spark generation devices and any other device that produces a high current flow when a fast increase of charge carriers is created within a solid, liquid, or gaseous material and the spark may include a plasma.
Using a spark to cause switching action has been used in prior art pulsers such as the transmission line pulser (TLP) diagramed in FIG. 3. A TLP uses a cable, or similar constant impedance conductor, which is precharged to a high voltage while isolated by a switch and then discharged when a spark in formed in the switch which connects the charged cable to the pulser output. The action of the discharge of the cable produces a rectangular pulse which is then applied to the DUT. These spark discharge pulsers can produce pulses of 500V into 50-ohm cables with less than 1 ns rise time. This is a peak power of 5,000 watts and 800 V/ns slew rate. In addition pulse widths of 10 ns and shorter can be generated. The spark discharge pulser performance parameters exceed what can be produced by today's solid state pulsers making them preferred to test high power transistors.
There are advantages and disadvantages of both the solid state and the spark discharge pulse generators. The solid state pulser is highly controllable, but has limited voltage and current capabilities. The spark discharge pulser has very high voltage and current pulses, but the timing of its pulse is not well controlled. Because the spark is started by a lucky electron beginning an avalanche of charge carriers relatively long after the mechanical switch activation time, the pulse generation from pulse-to-pulse can vary by hundreds of pulse width times. It is a purpose of the present invention to use the advantages of both types of generators to produce pulses that can be used to test modern transistors. This requires synchronization of the timing of pulses from both types of pulsers. It is a purpose of this invention to produce pulses useful in transistor and IC testing such as, but not limited to, pulsed I-V measurements.
In the present invention, a signal from the spark discharge pulser will trigger the solid state pulser. The output of the spark discharge pulser will pass through a delay cable so that its leading edge will be roughly in coincidence with the solid state pulser output leading edge. The triggering of the solid state pulser is done with a signal typically delivered via a 50-ohm cable. Most solid state pulsers can be triggered by either positive or negative going edge transitions. Some solid state pulsers have a user settable trigger voltage levels and some pulsers use standard logic levels to define the trigger levels. There are common logic level definitions that can be used to define trigger voltage levels, such as transistor-transistor logic (TTL) based on +5V power or emitter coupled logic (ECL) based on −5.2V power. New versions of ECL that are based on positive voltages can also be used. TTL has logic voltage levels with logic low usually defined as <0.8V and logic high defined as >2 volts. ECL has negative logic levels and is designed to drive into a 50 ohm ground connected terminating load with <−1.75V as logic low and >−0.9V as logic high. An advantage of using an ECL family is they are directly able to drive 50-ohm cable. It is a purpose of the present invention to provide trigger signals that are compatible with all logic levels needed to trigger solid state pulsers.
New semiconductor testers are needed with the pulse capabilities of both solid state and spark discharge pulsers. This would allow the testing of high power transistors such as those used in pulsed operation power supplies, class D amplifiers, radio transmitters and pulsed radar systems. Transistor performance in pulsed low duty cycle circuits can be measured with pulsed measurement systems to voltage and/or current levels outside the safe operating area of continuous operation of the transistor under test. Some prior art tester have pulsed both the gate and drain of MOS transistors. These testers use only solid state pulsers which can not generate the high power pulses to perform these tests on all types of DUTs.
Therefore, there is a need for new equipment and methodologies to produce testing pulses, including those of high power, from multiple sources with relative timing that is repeatable and controllable to evaluate the performance of transistors, integrated circuits (ICs), and other devices, components and subassemblies under pulsed conditions.